Test Bench Example
To get familiar with the operation, it’s probably best to throw some 74xx logic chip in there and check out it’s operation. For this example, we’re going to use the 74HC04 hex inverter. Here’s a quick peek at the pinout to refresh your memory.
Fig 6 – 74HC04 Pinout
The 74HC04 is packaged as a 14-DIP with standard power & gnd corners. By inspecting the pin map cheat sheet, we see that this IC can be placed in a number of places and directions. To keep it simple, we will place it “tail aligned” at the top of the ZIF socket. This means that pins 7,8 of the IC will be in ZIF 20, 21 respectively. Pin 20 will be configured to GND, and pin 27 will be configured to VCCx. We’ll set VCCx to 5v for this testing.
In order to make it easy to see, all unused pins will start out in the 0 state and all IC pins will start out in the 1, or pullup, state. Here’s a screen shot with all config work done but no IC inserted. You may note that p20 is set hi (tristate with ext pullup) and yet the pin is pulled down externally by the GND connection – therefore, it reads low.
Fig 7 – Bench Test Setup for 74HC04
The next step is to insert the IC and click the read button. Actually, you probably don’t want to “hot plug” chips like this with the VDD already applied. But these little logic chips are sturdy and will take it – no problem as long as you realize it’s not a good practice.
When we click read, we see that every other pin corresponding to an inverter output has been pulled low, even while their output is written to a 1. Hey – look at that! Our inverter seems to be inverting!
Fig 8 – 7404 Inserted, reading 0′s on all inverter outputs
Now to test and see if there’s anything going on inside the chip, let’s try to toggle a pin. We’ll uncheck inverter input 6A on ZIF pin 26. We leave the pullup active (checked) on that inverter’s OUTPUT, 6Y on ZIF 25. And ‘lo and behold – it toggles! ZIF p25 goes high immediately when ZIF26 goes low. Looks like an inverter so far!
Fig 9 – Toggling 74HC04 inverter 6 by twiddling p26 and watching p25.
Now we’ll try toggling all the inverters to make sure they are all functioning. Here’s a pic with all inputs LOW, all outputs HI.
Fig 10 – All inverters doing what they’re told
If you take a look at the Write Data textbox, you will see that it’s updating for each different state of our little test routine. By copying and pasting these data writes into a script, you can begin building exercises for your own IC’s. The script engine will fetch a data read if it encounters a 07 in a script file, but for now there is no way to compare that input data to some desired data to decide whether the IC is passing or failing.
It’s probably an easy thing to implement, but just hasn’t been done yet. If you’d like to give it a whack, look into the source code at the two implementations (text based and binary) of the script execution routines. It should be easy to find where the $07 is detected and fires a read. At that point, perhaps you just have to compare what’s read to the next line of the file for example.
Honestly, if there is great demand for a digital tester then the best route is to write a piece of software to read test vector output from Modelsim or something and translate it to pin data to send to the Top. Then, the result could be written back into the standard format and compared in the wave viewer. Please note that the system clock is 24MHz, so super high speed testing may be out of the question unless you are able to able to pipe a faster clock in on one of the GCLK lines that happens to touch the ZIF. These happen to be ZIF18 and ZIF31. The other CLK lines are taken up with VPP14, VPP31, nWR, and the 24MHz system clock.
Enough chatter on the software. Here’s the source and executable for the OpenTop2 software shown above. Remember, it’s a work in progress. Please drop us a line if you go about improving or cleaning up the tool – we’d be glad to post your works.
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